Processors in modern multiprocessor systems commonly share data contained in shared data storage that is accessed and modified by all of the processors in the multiprocessor system. Many computer programs include a sequence of operations that require shared data storage to be accessed atomically from the perspective of each accessing processor. Atomic access of data refers to a condition where a sequence of instructions that begins reading and/or modifying a set of shared data is able to access that set of shared data without another processor reading and/or modifying that set of shared data until the first processor is done with the processing of that data.
Several conventional techniques are used to limit access to shared data storage. One technique is referred to as a lock. A lock mechanism allows one processor to read and/or modify shared data. Locks are usually implemented by Compare-and-swap (CAS) or similar instructions. Lock mechanisms, however, block other processes during the shared memory access and thereby impact processing performance, limit efficient scaling, and possibly leading to a processing deadlock by two processors that are trying to simultaneously access common sets of data.
Transactional memory is another method of limiting access to shared memory. A transaction consists of a sequence of instructions that store data to private storage and that end with a commit instruction if the transaction is successful. Each storage location that is read or modified by the transaction is marked and if any marked storage locations are modified by another processor, the transaction aborts. If the transaction does not abort, the commit instruction copies all of the modifications in private storage into the shared data. Transactional memory, however, limits processing to accessing data able to be stored in the often limited private storage and adds processing overhead associated with maintaining the marking data for each memory location.
Access to shared memory is also controlled by a load-linked (LL) and store-conditional (SC) pair of instructions. The LL reads a shared data storage location and the SC writes a new value into that same storage location. Any updates to the storage location between the LL and SC causes the SC to fail and thereby not modify the storage location. LL and SC memory access controls exhibit limitations similar to those discussed above for lock mechanisms.
Therefore, the accessing shared memory by multiple processor computing systems is able to be improved by a more efficient shared memory control mechanism.